Papers - ICHIJO KENJI
-
Information Exchange Among Routers Using Newly Defined IP Options for Traffic Control
Hiroto Hoshiba, Kenji Ichijo and Akiko Narita
Proceedings of the 2023 Congress in Computer Science, Computer Engineering, & Applied Computing 2023.7
-
Stable Operation of Redundant Traffic Reduction System with Packet Cache by Relay Point Designation
Hiroto Hoshiba, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Internet Computing and Internet of Things 2023.4
-
Design of Multicore Dataflow DSPs with Different Loop Iteration Mechanisms
Shun Orita, Akiko Narita and Kenji Ichijo
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan 109 - 110 2022.7
-
Host-Independent Autonomous Decision of Operations of the Redundant Traffic Reduction Node
Michi Ishikuro, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Internet Computing and Internet of Things 25 - 31 2019.8
-
Cache Optimization in Reduction of Redundant Traffic with Variety in Delivery Progress and Transmission Rate
Kyosuke Doh, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Internet Computing and Internet of Things 17 - 23 2018.7
-
Comparative Evaluation of Multicore Dataflow DSPs with Different Arithmetic Units
Kenji Ichijo, Sora Deguchi and Akiko Narita
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan 107 - 108 2018.5
-
Optimization of Packet Cache Utilization of Network Node for Redundant Traffic Reduction
Wataru Yokota, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Internet Computing and Internet of Things 52 - 58 2017.7
-
Evaluation of the Redundant Traffic Reduction Node Using the Packet Cache Coping with Different Byte Offsets among Streams
Wataru Yokota, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Networking and Network Applications 227 - 232 2016.7
-
Autonomous Decision of Function of the Redundant Traffic Reduction Node Using a New IP Option
Tomohiro Yoshida, Yamato Ikeda, Kenji Ichijo and Akiko Narita
Proceedings of the International Conference on Networking and Network Applications 233 - 238 2016.7
-
Design and Evaluation of a Multicore Dataflow DSP with Modified Ring Interconnection Networks
Kenji Ichijo, Masato Kubota and Akiko Narita
INFORMATION 19 ( 6(B) ) 2403 - 2418 2016.6
-
Expansion of Operations in a Multicore Dataflow DSP
Kenji Ichijo, Sora Deguchi and Akiko Narita
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan 278 - 279 2016.5
-
Expansion of Region for Redundant Traffic Reduction with Packet Cache of Network Node
Shunsuke Furuta, Michihiro Okamoto, Kenji Ichijo, Akiko Narita
Proceedings of the International Conference on Internet Computing and Big Data 2015.7
-
Design and Evaluation of a Ring Interconnected Multicore Dataflow DSP with a Low Cost Fault Tolerant Mechanism
Kenji Ichijo and Koshi Nitobe
INFORMATION 17 ( 1 ) 99 - 110 2014.1
-
Modification and Evaluation of Software-Based Communications Unit of a LSC on Chip
Akiko Narita, Naoya Kato, Kenji Ichijo, Yoshio Yoshioka
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications 2011.7
-
Design and evaluation of Burst-mode Asynchronous 8-bit microprocessor using Standard FPGA Development System
Tatsuya Suto, Kenji Ichijo and Yoshio Yoshioka
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems 2010.10
-
CFBLT:Closed FeedBack Loop Type Queuing System
Tomoyuki Nagase, Kenji Ichijo, Akiko Narita and Yoshio Yoshioka
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems 2010.10
-
Comprehensive Evaluation of Packet Flow Control Methods for a Ring Network of Processors on Chip
Akiko Narita, Kenji Ichijo and Yoshio Yoshioka
Proceedings of the 9th IEEE/ACIS International Conference on Computer and Information Science 2010.8
-
Evaluation of Packet Flow Control Methods for a LSC on Chip with Hardware Requirements and Performance
Akiko Narita, Kenji Ichijo and Yoshio Yoshioka
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications 2010.7
-
Comparative Evaluation of LSC-Based DSP with five kinds of link width
Kenji Ichijo, Kazuki Niiyama and Yoshio Yoshioka
INFORMATION 13 ( 3(B) ) 1047 - 1054 2010.5
-
Design of Burst-mode Asynchronous Control Unit of 8-bit microprocessor using Standard FPGA Development System
Kenji Ichijo, Tatsuya Suto and Yoshio Yoshioka
INFORMATION 13 ( 3(B) ) 1039 - 1046 2010.5
-
Execution time measurement of a vector operation on LSC-Based DSP
Kazuki Niiyama, Kenji Ichijo, Akiko Narita and Yoshio Yoshioka
Proceedings of the International Symposium on Intelligent Signal Processing and Communication Systems 2009.2
-
Design and Evaluation of LSC-Based DSP with 8-bit Wide Link
Kenji Ichijo, Kazuki Niiyama and Yoshio Yoshioka
INFORMATION 12 ( 1 ) 173 - 181 2009.1
-
ワンチップＬＳＣにおける通信専用ＣＰＵ
熊谷龍太,一條健司,成田明子,吉岡良雄
電子情報通信学会技術報告 FIIS06 No.180 2006.6
-
LSC-Based DSPの実装と評価について
一條健司,吉岡良雄
電子情報通信学会技術報告 FIIS06 No.179 2006.6
-
プログラマブル・デバイスを用いた LSC-Based DSPの試作
一條健司,吉岡良雄
電子情報通信学会技術報告 FIIS04 No.148 2004.10
-
Efficient Implementation of the Vector Operation on the Loop Structured Computer
Kenji Ichijo and Yoshio Yoshioka
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications 2003.6
-
標数2の体上での楕円曲線の位数計算
福士広大,一條健司,吉岡良雄
情報処理学会研究報告 Vol.2003, No.45 2003.5